Lecture_4.ppt

ECE 445 ? Computer Organization Machine Instructions Arithmetic and Logic Instructions ECE 445 - Computer Organization * Simplified MIPS Datapath ECE 445 - Computer Organization ECE 445 - Computer Organization * R-Format Instructions Read two register operands Perform arithmetic/logical operation Write register result ECE 445 - Computer Organization ECE 445 - Computer Organization * Simplified Datapath for the R-format Instructions Control Unit instruction control signals ECE 445 - Computer Organization ECE 445 - Computer Organization * Add Operation with Register Operands Example: a = b + c; (HLL) Assume the following compiler assignments: b ? $s0 c ? $s1 a ? $t0 Resulting MIPS Assembly Instruction add $t0, $s0, $s1 Given: b = 7, c = 5 rs rt rd ECE 445 - Computer Organization ECE 445 - Computer Organization * Add Operation with Register Operands [31..0] [25..21] [20..16] [15..11] rs rt rd Control Unit [31..26] control signals ECE 445 - Computer Organization ECE 445 - Computer Organization * Add Operation with Register Operands add $t0, $s0, $s1 $s0 $s1 $t0 add 7 5 12 Control Unit opcode control signals ECE 445 - Computer Organization ECE 445 - Computer Organization * Add Operation with Immediate Operand Example: a = a + 4; (HLL) Assume the following compiler assignment: a ? $s2 Resulting MIPS Assembly Instruction addi $s2, $s2, 4 Given: a = 12 rs immediate operand rt ECE 445 - Computer Organization ECE 445 - Computer Organization * Add Operation with Immediate Operand addi $s2, $s2, 4 $s2 $s2 addi 12 16 4 4 Control Unit opcode control signals ECE 445 - Computer Organization ECE 445 - Computer Organization * Question: Why does the MIPS Instruction Set Architecture not include a subi (Subtract Immediate) instruction? ECE 445 - Computer Organization ECE 445 - Computer Organization * Sign Extension Register operands are 32 bits long. Immediate operands are only 16 bits long. Need to sign extend the immediate operand To sign extend a binary number The MSB is 0 for positive numbers 1 for negative numbers Copy the MSB into the additional bit positions +5 = 0101 (4 bits) ? 0000 0101 (8 bits) - 3 = 1101 (4 bits) ? 1111 1101 (8 bits) ECE 445 - Computer Organization ECE 445 - Computer Organization * Data Transfer Instructions ECE 445 - Computer Organization ECE 445 - Computer Organization * Load Word Instruction lw $t0, 32($s3) rt rs immediate operand Base address offset ECE 445 - Computer Organization ECE 445 - Computer Organization * Load Word Instruction lw $t0, 32($s3) $s3 $t0 addi Base Addr 32 Addr read 32 Data from Memory ECE 445 - Computer Organization ECE 445 - Computer Organization * Store Word Instruction sw $s1, 48($s3) rt rs immediate operand Base address offset ECE 445 - Computer Organization ECE 445 - Computer Organization * Store Word Instruction sw $s1, 48($s3) $s3 $s1 addi Base Addr 48 Addr write 48 Data to Memory ECE 445 - Computer Organization ECE 445 - Computer Organization * Spilling Registers Memory is larger but slower than registers. There are fewer registers than memory locations. The MIPS is a Load and Store Architecture meaning that all operands for arithmetic and logical operations must be in registers. The process of putting less commonly used variables (or those needed later) into memory is called spilling registers. Data must be moved back and forth between memory and registers. ECE 445 - Computer Organization ECE 445 - Computer Organization * Revisiting Instruction Formats add $t0, $s1, $s2 lw $t0, 400($t1) rt rs immediate operand rt rs rd source destination R-type Format I-type Format ECE 445 - Computer Organization